diff -upNr asl-1.42b226/as.c asl-1.42b226-im6100/as.c
--- asl-1.42b226/as.c	2022-07-12 19:56:43.000000000 +0900
+++ asl-1.42b226-im6100/as.c	2022-07-14 20:53:51.028958458 +0900
@@ -150,6 +150,7 @@
 #include "codekenbak.h"
 #include "codecp1600.h"
 #include "codenano.h"
+#include "code6100.h"
 /**          Code21xx};**/
 
 static long StartTime, StopTime;
@@ -4385,6 +4386,7 @@ int main(int argc, char **argv)
     codekenbak_init();
     codecp1600_init();
     codenano_init();
+    code6100_init();
     First = FALSE;
   }
 
diff -upNr asl-1.42b226/as.res asl-1.42b226-im6100/as.res
--- asl-1.42b226/as.res	2022-06-11 17:51:00.000000000 +0900
+++ asl-1.42b226-im6100/as.res	2022-07-20 23:13:36.931623089 +0900
@@ -203,6 +203,14 @@ Message ErrMsgIndexedForIndirect
  "verwende indizierte anstelle indirekter Adressierung"
  "using indexed instead of indirect addressing"
 
+Message ErrMsgNotInNormalmode
+ ""
+ "not allowed in normal mode"
+
+Message ErrMsgNotInPanelmode
+ ""
+ "not allowed in panel mode"
+
 ;*****
 
 Message ErrMsgDoubleDef
@@ -985,6 +993,18 @@ Message ErrMsgInvCBAR
  "ung&uuml;ltiger Wert f&uuml;r CBAR"
  "invalid CBAR value"
 
+Message ErrMsgInAccPageErr
+ ""
+ "page not accessible"
+
+Message ErrMsgInAccFieldErr
+ ""
+ "field not accessible"
+
+Message ErrMsgInvCombination
+ ""
+ "invalid instruction combination"
+
 Message ErrMsgInternalError
  "interner Fehler"
  "internal error"
diff -upNr asl-1.42b226/asmerr.c asl-1.42b226-im6100/asmerr.c
--- asl-1.42b226/asmerr.c	2022-06-11 17:51:00.000000000 +0900
+++ asl-1.42b226-im6100/asmerr.c	2022-07-20 23:13:36.062534128 +0900
@@ -251,6 +251,10 @@ static const char *ErrorNum2String(tErro
       msgno = Num_ErrMsgRegNumWraparound; break;
     case ErrNum_IndexedForIndirect:
       msgno = Num_ErrMsgIndexedForIndirect; break;
+    case ErrNum_NotInNormalmode:
+      msgno = Num_ErrMsgNotInNormalmode; break;
+    case ErrNum_NotInPanelmode:
+      msgno = Num_ErrMsgNotInPanelmode; break;
     case ErrNum_DoubleDef:
       msgno = Num_ErrMsgDoubleDef; break;
     case ErrNum_SymbolUndef:
@@ -652,6 +656,12 @@ static const char *ErrorNum2String(tErro
       msgno = Num_ErrMsgUnknownBitBltOpt; break;
     case ErrNum_InvCBAR:
       msgno = Num_ErrMsgInvCBAR; break;
+    case ErrNum_InAccPageErr:
+      msgno = Num_ErrMsgInAccPageErr; break;
+    case ErrNum_InAccFieldErr:
+      msgno = Num_ErrMsgInAccFieldErr; break;
+    case ErrNum_InvCombination:
+      msgno = Num_ErrMsgInvCombination; break;
     case ErrNum_InternalError:
       msgno = Num_ErrMsgInternalError; break;
     case ErrNum_OpeningFile:
diff -upNr asl-1.42b226/code6100.c asl-1.42b226-im6100/code6100.c
--- asl-1.42b226/code6100.c	1970-01-01 09:00:00.000000000 +0900
+++ asl-1.42b226-im6100/code6100.c	2022-07-20 23:14:42.900148573 +0900
@@ -0,0 +1,632 @@
+/* code6100.c */
+/*****************************************************************************/
+/* SPDX-License-Identifier: GPL-2.0-only OR GPL-3.0-only                     */
+/*                                                                           */
+/* AS-Portierung                                                             */
+/*                                                                           */
+/* Codegenerator Intersil IM6100                                             */
+/*                                                                           */
+/*****************************************************************************/
+
+#include "stdinc.h"
+#include <ctype.h>
+#include <string.h>
+
+#include "nls.h"
+#include "strutil.h"
+#include "chunks.h"
+#include "asmdef.h"
+#include "asmsub.h"
+#include "asmpars.h"
+#include "asmallg.h"
+#include "asmitree.h"
+#include "codevars.h"
+#include "codepseudo.h"
+#include "headids.h"
+#include "errmsg.h"
+#include "onoff_common.h"
+
+#include "code6100.h"
+
+/*---------------------------------------------------------------------------*/
+
+static CPUVar CPU6100;
+static CPUVar CPU6120;
+
+static PInstTable InstTableOP[3]; /* Operate Instruction */
+static Boolean BaseInst;
+static tErrorNum PendingError;
+
+static const Word Inst6120 =  0x8000;
+static const Word PanelOnly = 0x4000;
+static const Word NormOnly =  0x2000;
+
+static LongInt IBVal;
+
+static Boolean PanelMode;
+static unsigned int mregistered = 0;
+
+static ASSUMERec ASSUME6100[] =
+{
+	{"IB", &IBVal, 0, 7, 0xff, NULL},
+};
+
+/*---------------------------------------------------------------------------*/
+
+static Boolean ChkValidInst(Word Index, tErrorNum *pError)
+{
+	if (Index & Inst6120)
+	{
+		if (MomCPU < CPU6120)
+		{
+			if (pError) *pError = ErrNum_InstructionNotSupported;
+			else WrError(ErrNum_InstructionNotSupported);
+			return False;
+		}
+	}
+
+	if (Index & PanelOnly)
+	{
+		if (!PanelMode)
+		{
+			if (pError) *pError = ErrNum_PrivOrder;
+			//else WrError(ErrNum_PrivOrder);	// Panel mode instruction
+			else WrError(ErrNum_NotInNormalmode);
+		}
+	}
+	if (Index & NormOnly)
+	{
+		if (PanelMode)
+		{
+			if (pError) *pError = ErrNum_PrivOrder;
+			//else WrError(ErrNum_PrivOrder);	// Normal mode instruction
+			else WrError(ErrNum_NotInPanelmode);
+		}
+	}
+
+	return True;
+}
+
+/*---------------------------------------------------------------------------*/
+
+static void DecodeMR(Word Index)
+{
+	Boolean Indirect = False;
+	Boolean CurrPage = True;
+	Word adrPos = 1;
+	Word Adr;
+	Boolean OK;
+	tSymbolFlags Flags;
+
+	if (!ChkValidInst(Index, NULL)) return;
+	Index &= 07777;
+
+	if (!ChkArgCnt(1,2)) return;
+
+	if (ArgCnt == 2)
+	{
+		if (as_strcasecmp(ArgStr[1].str.p_str, "I"))
+		{
+			WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[1]);
+			return;
+		}
+		adrPos = 2;
+		Indirect = True;
+	}
+
+	Adr = EvalStrIntExpressionWithFlags(&ArgStr[adrPos], UInt15, &OK, &Flags);
+	if (!OK) return;
+
+	if (!mFirstPassUnknownOrQuestionable(Flags))
+	{
+		if ((Index == 04000 || Index == 05000) && !Indirect)
+		{
+			if (IBVal == ASSUME6100[0].NothingVal)
+			{
+				if ((Adr & 070000) != (EProgCounter() & 070000))
+				{
+					/* Address not in current field */
+					WrError(ErrNum_InAccFieldErr);
+					return;
+				}
+			}
+			else
+			{
+				if ((Adr & 070000) != (IBVal << 12))
+				{
+					/* Address not in IB field */
+					WrError(ErrNum_InAccFieldErr);
+					return;
+				}
+			}
+		}
+		else
+		{
+			if ((Adr & 070000) != (EProgCounter() & 070000))
+			{
+				/* Address not in current field */
+				WrError(ErrNum_InAccFieldErr);
+				return;
+			}
+		}
+	}
+
+	if (!(Adr & 07600))
+	{
+		/* Zero page */
+		CurrPage = False;
+	}
+	else if ((Adr & 07600) != (EProgCounter() & 07600))
+	{
+		/* Not in current page */
+		WrError(ErrNum_InAccPageErr);
+		return;
+	}
+
+	WAsmCode[0] = Index | (Indirect ? 00400 : 0) | (CurrPage ? 00200 : 0) | (Adr & 00177);
+	CodeLen = 1;
+}
+
+static void DecodeOP(int gp, Word Index, Boolean (*check)(Word i1, Word i2))
+{
+	Word i;
+
+	if (!ChkValidInst(Index, &PendingError)){
+		return;
+	}
+	Index &= 07777;
+
+	if (BaseInst)
+	{
+		WAsmCode[0] = Index;
+		CodeLen = 1;
+
+		BaseInst = False;
+		for (i = 1; i <= ArgCnt; i++)
+		{
+			if (!LookupInstTable(InstTableOP[gp], ArgStr[i].str.p_str))
+			{
+				PendingError = ErrNum_UnknownInstruction;
+				CodeLen = 0;
+				return;
+			}
+		}
+	}
+	else
+	{	/* 2nd, 3rd instruction */
+		Word tmp;
+
+		if (CodeLen > 0)
+		{
+			tmp = WAsmCode[0] | Index;
+			if (tmp == WAsmCode[0] || tmp == Index)
+			{
+				PendingError = ErrNum_InvCombination;
+				CodeLen = 0;
+				return;
+			}
+			if ((tmp & 00016) == 00016 )
+			{
+				PendingError = ErrNum_InvCombination;
+				CodeLen = 0;
+				return;
+			}
+
+			if (check && !(*check)(WAsmCode[0], Index))
+			{
+				PendingError = ErrNum_InvCombination;
+				CodeLen = 0;
+				return;
+			}
+
+			WAsmCode[0] = tmp;
+		}
+	}
+}
+
+static Boolean CheckOP1(Word i1, Word i2)
+{
+	if ((i1 & 00016) && (i2 & 00016)) return False;
+
+	return True;
+}
+
+static void DecodeOP1(Word Index)
+{
+	DecodeOP(0, Index, CheckOP1);
+}
+
+static Boolean CheckOP2(Word i1, Word i2)
+{
+	if ((i1 & 00160) && (i2 & 00160) && ((i1 & 00010) != (i2 & 00010))) return False;
+
+	return True;
+}
+
+static void DecodeOP2(Word Index)
+{
+	DecodeOP(1, Index, CheckOP2);
+}
+
+static void DecodeOP3(Word Index)
+{
+	DecodeOP(2, Index, NULL);
+}
+
+static void DecodeIOT(Word Index)
+{
+	Word dev;
+	Word opr;
+	Boolean OK;
+
+	if (!ChkValidInst(Index, NULL)) return;
+	Index &= 07777;
+
+	if (!ChkArgCnt(2,2)) return;
+
+	dev = EvalStrIntExpression(&ArgStr[1], UInt6, &OK);
+	if (!OK) return;
+
+	opr = EvalStrIntExpression(&ArgStr[2], UInt3, &OK);
+	if (!OK) return;
+
+	WAsmCode[0] = Index | (dev << 3) | opr;
+	CodeLen = 1;
+}
+
+static void DecodeFix(Word Index)
+{
+	if (!ChkValidInst(Index, NULL)) return;
+	Index &= 07777;
+
+	if (!ChkArgCnt(0,0)) return;
+
+	WAsmCode[0] = Index;
+	CodeLen = 1;
+}
+
+static void DecodeMEI(Word Index)
+{
+	int fieldPos = 1;
+	Word field;
+	Boolean OK;
+
+	if (!ChkValidInst(Index, NULL)) return;
+	Index &= 07777;
+
+	if (!ChkArgCnt(1,2)) return;
+
+	if (ArgCnt == 2)
+	{
+		if ((!as_strcasecmp(OpPart.str.p_str, "CDF") && !as_strcasecmp(ArgStr[1].str.p_str, "CIF")) ||
+			(!as_strcasecmp(OpPart.str.p_str, "CIF") && !as_strcasecmp(ArgStr[1].str.p_str, "CDF")))
+		{
+			Index = 06203;
+			fieldPos = 2;
+		}
+		else
+		{
+			WrError(ErrNum_UnknownInstruction);
+			return;
+		}
+	}
+
+	field = EvalStrIntExpression(&ArgStr[fieldPos], UInt3, &OK);
+	if (!OK) return;
+
+	WAsmCode[0] = Index | (field << 3);
+	CodeLen = 1;
+}
+
+static void DecodeRadix(Word Index)
+{
+	if (!ChkArgCnt(0,0)) return;
+
+	RadixBase = Index;
+}
+
+static Boolean DecodeConst(tStrComp *pStr)
+{
+	TempResult t;
+	tSymbolFlags Flags;
+	int c;
+
+	EvalStrExpression(pStr, &t);
+	Flags = t.Flags;
+	switch(t.Typ)
+	{
+	case TempInt:
+		if (!mFirstPassUnknownOrQuestionable(Flags))
+			if (!ChkRange(t.Contents.Int, -2048, 4095)) break;
+
+		WAsmCode[CodeLen++] = t.Contents.Int;
+		break;
+	case TempString:
+		as_chartrans_xlate_nonz_dynstr(CurrTransTable->Table, &t.Contents.str);
+		for (c = 0; c < (int)t.Contents.str.len; c++)
+		{
+			WAsmCode[CodeLen++] = t.Contents.str.p_str[c] & 07777;
+		}
+		break;
+	default:
+		return False;
+	}
+
+	return True;
+}
+
+static Boolean DecodeDefault(tStrComp *OpStr)
+{
+	Boolean result;
+	int i;
+
+	result = DecodeConst(OpStr);
+
+	for (i = 1; i <=ArgCnt; i++)
+	{
+		if (result)
+		{
+			result = DecodeConst(&ArgStr[i]);
+		}
+	}
+
+	if (!result) CodeLen = 0;
+
+	return result;
+}
+
+/*---------------------------------------------------------------------------*/
+
+static void AddMR(const char *NName, Word NCode)
+{
+	AddInstTable(InstTable, NName, NCode, DecodeMR);
+}
+
+static void AddOP1(const char *NName, Word NCode)
+{
+	AddInstTable(InstTableOP[0], NName, NCode, DecodeOP1);
+}
+
+static void AddOP2(const char *NName, Word NCode)
+{
+	AddInstTable(InstTableOP[1], NName, NCode, DecodeOP2);
+}
+
+static void AddOP3(const char *NName, Word NCode)
+{
+	AddInstTable(InstTableOP[2], NName, NCode, DecodeOP3);
+}
+
+static void AddIOT(const char *NName, Word NCode)
+{
+	AddInstTable(InstTable, NName, NCode, DecodeIOT);
+}
+
+static void AddFix(const char *NName, Word NCode)
+{
+	AddInstTable(InstTable, NName, NCode, DecodeFix);
+}
+
+static void AddMEI(const char *NName, Word NCode)
+{
+	AddInstTable(InstTable, NName, NCode, DecodeMEI);
+}
+
+static void AddRadix(const char *NName, Word NCode)
+{
+	AddInstTable(InstTable, NName, NCode, DecodeRadix);
+}
+
+static void InitFields(void)
+{
+	InstTable = CreateInstTable(48);
+	InstTableOP[0] = CreateInstTable(32);
+	InstTableOP[1] = CreateInstTable(32);
+	InstTableOP[2] = CreateInstTable(32);
+
+	/* Memory Reference Instruction */
+	AddMR("AND", 00000);
+	AddMR("TAD", 01000);
+	AddMR("ISZ", 02000);
+	AddMR("DCA", 03000);
+	AddMR("JMS", 04000);
+	AddMR("JMP", 05000);
+
+	/* Operate Instruction (Group 1) */
+	AddOP1("NOP", 07000);
+	AddOP1("IAC", 07001);
+	AddOP1("RAL", 07004);
+	AddOP1("RTL", 07006);
+	AddOP1("R3L", 07014 | Inst6120);
+	AddOP1("RAR", 07010);
+	AddOP1("RTR", 07012);
+	AddOP1("BSW", 07002);
+	AddOP1("CML", 07020);
+	AddOP1("CMA", 07040);
+	AddOP1("CIA", 07041);
+	AddOP1("CLL", 07100);
+	AddOP1("STL", 07120);
+	AddOP1("CLA", 07200);
+	AddOP1("GLK", 07204);
+	AddOP1("GLT", 07204);	/* Some documents say "GLT" */
+	AddOP1("STA", 07240);
+
+	/* Operate Instruction (Group 2) */
+	AddOP2("NOP", 07400);
+	AddOP2("HLT", 07402);
+	AddOP2("OSR", 07404);
+	AddOP2("SKP", 07410);
+	AddOP2("SNL", 07420);
+	AddOP2("SZL", 07430);
+	AddOP2("SZA", 07440);
+	AddOP2("SNA", 07450);
+	AddOP2("SMA", 07500);
+	AddOP2("SPA", 07510);
+	AddOP2("CLA", 07600);
+	AddOP2("LAS", 07604);
+
+	/* Operate Instruction (Group 3) */
+	AddOP3("NOP", 07401);
+	AddOP3("MQL", 07421);
+	AddOP3("MQA", 07501);
+	AddOP3("SWP", 07521);
+	AddOP3("CLA", 07601);
+	AddOP3("CAM", 07621);
+	AddOP3("ACL", 07701);
+
+	/* I/O Transfer Instruction */
+	AddIOT("IOT", 06000);
+	AddFix("SKON", 06000 | NormOnly);
+	AddFix("ION", 06001);
+	AddFix("IOF", 06002);
+	AddFix("SRQ", 06003 | NormOnly);
+	AddFix("GTF", 06004 | NormOnly);
+	AddFix("RTF", 06005);
+	AddFix("SGT", 06006);
+	AddFix("CAF", 06007);
+
+	/* Stack Operation Instruction (6120 only) */
+	AddFix("PPC1", 06205 | Inst6120);
+	AddFix("PPC2", 06245 | Inst6120);
+	AddFix("PAC1", 06215 | Inst6120);
+	AddFix("PAC2", 06255 | Inst6120);
+	AddFix("RTN1", 06225 | Inst6120);
+	AddFix("RTN2", 06265 | Inst6120);
+	AddFix("POP1", 06235 | Inst6120);
+	AddFix("POP2", 06275 | Inst6120);
+	AddFix("RSP1", 06207 | Inst6120);
+	AddFix("RSP2", 06227 | Inst6120);
+	AddFix("LSP1", 06217 | Inst6120);
+	AddFix("LSP2", 06237 | Inst6120);
+
+	/* Internal Control Instruction */
+	AddFix("WSR", 06246 | Inst6120);
+	AddFix("GCF", 06256 | Inst6120);
+
+	/* Main Memory Control Instruction (6120 only) */
+	AddFix("PR0", 06206 | Inst6120 | NormOnly);
+	AddFix("PR1", 06216 | Inst6120 | NormOnly);
+	AddFix("PR2", 06226 | Inst6120 | NormOnly);
+	AddFix("PR3", 06236 | Inst6120 | NormOnly);
+
+	/* Panel Mode Instruction */
+	AddFix("PRS", 06000 | PanelOnly);
+	AddFix("PG0", 06003 | PanelOnly);
+	AddFix("PEX", 06004 | PanelOnly);
+	AddFix("CPD", 06266 | PanelOnly);
+	AddFix("SPD", 06276 | PanelOnly);
+
+	/* Memory Extension Instruction */
+	AddMEI("CDF", 06201 | Inst6120);
+	AddMEI("CIF", 06202 | Inst6120);
+	AddFix("RDF", 06214 | Inst6120);
+	AddFix("RIF", 06224 | Inst6120);
+	AddFix("RIB", 06234 | Inst6120);
+	AddFix("RMF", 06244 | Inst6120);
+
+	/* Pseudo Instruction */
+	AddRadix("DECIMAL", 10);
+	AddRadix("OCTAL", 8);
+}
+
+static void DeinitFields(void)
+{
+	DestroyInstTable(InstTableOP[2]);
+	DestroyInstTable(InstTableOP[1]);
+	DestroyInstTable(InstTableOP[0]);
+	DestroyInstTable(InstTable);
+}
+
+/*---------------------------------------------------------------------------*/
+
+static void MakeCode_6100(void)
+{
+	int i;
+	Boolean Match = False;
+
+	CodeLen = 0;
+	DontPrint = False;
+
+	if (Memo("")) return;
+
+	if (LookupInstTable(InstTable, OpPart.str.p_str)) return;
+	PendingError = 0;
+	for (i = 0; i < 3; i++)
+	{
+		BaseInst = True;
+		if (LookupInstTable(InstTableOP[i], OpPart.str.p_str)) Match = True;
+		if (CodeLen) return;
+	}
+	if (Match)
+	{
+		if (PendingError) WrError(PendingError);
+		return;
+	}
+	if (DecodeDefault(&OpPart)) return;
+}
+
+static void InitCode_6100(void)
+{
+	mregistered = 0;
+
+	IBVal = 0;
+}
+
+static Boolean IsDef_6100(void)
+{
+	return False;
+}
+
+static void SwitchFrom_6100(void)
+{
+	DeinitFields();
+}
+
+static void SwitchTo_6100(void)
+{
+	const TFamilyDescr *pDescr;
+
+	TurnWords = True;
+	SetIntConstMode(eIntConstModeC);
+
+	pDescr = FindFamilyByName("IM6100");
+	PCSymbol = ".";
+	HeaderID = pDescr->Id;
+	NOPCode = 0x7000;
+	DivideChars = " \t";
+	HasAttrs = False;
+
+	ValidSegs = (1 << SegCode);
+	Grans[SegCode] = 2;
+	ListGrans[SegCode] = 2;
+	SegInits[SegCode] = 0x0000;
+	if (MomCPU >= CPU6120)
+		SegLimits[SegCode] = 0x7fff;
+	else
+		SegLimits[SegCode] = 0x0fff;
+
+	if (!(mregistered & (1 << 0)))
+	{
+		mregistered |= (1 << 0);
+		SetFlag(&PanelMode, "INPANEL", False);
+	}
+	AddONOFF("PANEL", &PanelMode, "INPANEL", False);
+
+	pASSUMERecs = ASSUME6100;
+	ASSUMERecCnt = 1;
+
+	MakeCode = MakeCode_6100;
+	IsDef = IsDef_6100;
+	SwitchFrom = SwitchFrom_6100;
+	InitFields();
+}
+
+void code6100_init(void)
+{
+	CPU6100 = AddCPU("6100", SwitchTo_6100);
+	CPU6120 = AddCPU("6120", SwitchTo_6100);
+
+	AddInitPassProc(InitCode_6100);
+
+	AddCopyright("Intersil IM6100 Generator (C) 2022 Haruo Asano");
+}
diff -upNr asl-1.42b226/code6100.h asl-1.42b226-im6100/code6100.h
--- asl-1.42b226/code6100.h	1970-01-01 09:00:00.000000000 +0900
+++ asl-1.42b226-im6100/code6100.h	2022-07-14 20:53:51.029513835 +0900
@@ -0,0 +1,14 @@
+#ifndef _CODE6100_H
+#define _CODE6100_H
+/* code6100.h */
+/*****************************************************************************/
+/* SPDX-License-Identifier: GPL-2.0-only OR GPL-3.0-only                     */
+/*                                                                           */
+/* AS-Portierung                                                             */
+/*                                                                           */
+/* Codegenerator Intersil IM6100                                             */
+/*                                                                           */
+/*****************************************************************************/
+
+extern void code6100_init(void);
+#endif /* _CODE6100_H */
diff -upNr asl-1.42b226/errmsg.h asl-1.42b226-im6100/errmsg.h
--- asl-1.42b226/errmsg.h	2022-06-11 17:51:00.000000000 +0900
+++ asl-1.42b226-im6100/errmsg.h	2022-07-20 23:13:36.534937178 +0900
@@ -59,6 +59,8 @@ typedef enum
   ErrNum_PaddingAdded = 360,
   ErrNum_RegNumWraparound = 370,
   ErrNum_IndexedForIndirect = 380,
+  ErrNum_NotInNormalmode = 390,
+  ErrNum_NotInPanelmode = 400,
   ErrNum_DoubleDef = 1000,
   ErrNum_SymbolUndef = 1010,
   ErrNum_InvSymName = 1020,
@@ -260,6 +262,9 @@ typedef enum
   ErrNum_ConfBitBltOpt = 2254,
   ErrNum_UnknownBitBltOpt = 2255,
   ErrNum_InvCBAR = 2260,
+  ErrNum_InAccPageErr = 2270,
+  ErrNum_InAccFieldErr = 2280,
+  ErrNum_InvCombination = 2290,
   ErrNum_InternalError = 10000,
   ErrNum_OpeningFile = 10001,
   ErrNum_ListWrError = 10002,
diff -upNr asl-1.42b226/headids.c asl-1.42b226-im6100/headids.c
--- asl-1.42b226/headids.c	2022-07-10 23:09:21.000000000 +0900
+++ asl-1.42b226-im6100/headids.c	2022-07-14 20:53:51.029677238 +0900
@@ -124,6 +124,7 @@ static const TFamilyDescr Descrs[] =
   { "1750"         , 0x004f, eHexFormatIntel   },
   { "CP1600"       , 0x000a, eHexFormatIntel   },
   { "NANO"         , 0x000b, eHexFormatIntel   },
+  { "IM6100"       , 0x000c, eHexFormatIntel   },
   { NULL           , 0xffff, eHexFormatDefault }
 };
 
diff -upNr asl-1.42b226/makedefs.src asl-1.42b226-im6100/makedefs.src
--- asl-1.42b226/makedefs.src	2022-07-10 23:11:59.000000000 +0900
+++ asl-1.42b226-im6100/makedefs.src	2022-07-14 20:53:51.030239563 +0900
@@ -108,7 +108,8 @@ CODE_OBJECTS = \
  $(TARG_OBJDIR)code1750$(TARG_OBJEXTENSION) \
  $(TARG_OBJDIR)codekenbak$(TARG_OBJEXTENSION) \
  $(TARG_OBJDIR)codecp1600$(TARG_OBJEXTENSION) \
- $(TARG_OBJDIR)codenano$(TARG_OBJEXTENSION)
+ $(TARG_OBJDIR)codenano$(TARG_OBJEXTENSION) \
+ $(TARG_OBJDIR)code6100$(TARG_OBJEXTENSION)
 
 DECODE_OBJECTS = \
  $(TARG_OBJDIR)deco68$(TARG_OBJEXTENSION) \
@@ -861,6 +862,11 @@ $(TARG_OBJDIR)codenano$(TARG_OBJEXTENSIO
 $(TARG_OBJDIR)codenano.dep: $(MKDEPENDTARGET)
 	$(CURRDIR)$(MKDEPENDTARGET) -r -c $(TARG_OBJEXTENSION) -o $@ $(TARG_OBJDIR)codenano$(TARG_OBJEXTENSION)
 
+$(TARG_OBJDIR)code6100$(TARG_OBJEXTENSION) : code6100.c
+	$(TARG_CC) $(ALLFLAGS) -o$(OBLANK)$@ -c code6100.c
+$(TARG_OBJDIR)code6100.dep: $(MKDEPENDTARGET)
+	$(CURRDIR)$(MKDEPENDTARGET) -r -c $(TARG_OBJEXTENSION) -o $@ $(TARG_OBJDIR)code6100$(TARG_OBJEXTENSION)
+
 $(TARG_OBJDIR)deco68$(TARG_OBJEXTENSION) : deco68.c
 	$(TARG_CC) $(ALLFLAGS) -o$(OBLANK)$@ -c deco68.c
 $(TARG_OBJDIR)deco68.dep: $(MKDEPENDTARGET)
diff -upNr asl-1.42b226/tests/t_6100/asflags asl-1.42b226-im6100/tests/t_6100/asflags
--- asl-1.42b226/tests/t_6100/asflags	1970-01-01 09:00:00.000000000 +0900
+++ asl-1.42b226-im6100/tests/t_6100/asflags	2022-07-14 22:44:56.811813634 +0900
@@ -0,0 +1 @@
+-L -n -listradix 8
\ No newline at end of file
diff -upNr asl-1.42b226/tests/t_6100/t_6100.asm asl-1.42b226-im6100/tests/t_6100/t_6100.asm
--- asl-1.42b226/tests/t_6100/t_6100.asm	1970-01-01 09:00:00.000000000 +0900
+++ asl-1.42b226-im6100/tests/t_6100/t_6100.asm	2022-07-20 23:18:32.343908634 +0900
@@ -0,0 +1,191 @@
+
+	CPU	6100
+
+	ORG	00000
+
+	NOP
+	NOP
+
+	JMP	I ZLABEL
+	NOP
+ZLABEL:	TOP
+
+	ORG	.+8
+
+	ORG	01000
+
+	;;
+	;; Intersil IM6100
+	;;
+
+TOP:
+	;; Memory Reference Instruction
+	AND	CLABEL
+	TAD	ZLABEL
+	ISZ	I CLABEL
+	DCA	I ZLABEL
+	JMS	CLABEL
+	JMP	ZLABEL
+
+	;; Operate Instruction (Group 1)
+	NOP
+	IAC
+	BSW
+	RAL
+	RTL
+	RAR
+	RTR
+	EXPECT 1500
+	R3L			; 6120 only
+	ENDEXPECT
+	CML
+	CMA
+	CIA
+	CLL
+	CLL RAL
+	CLL RTL
+	CLL RAR
+	CLL RTR
+	STL
+	CLA
+	CLA IAC
+	GLK
+	STA
+	CLA CLL
+
+	;; Operate Instruction (Group 2)
+	;; NOP
+	HLT
+	OSR
+	SKP
+	SNL
+	SZL
+	SZA
+	SNA
+	SZA SNL
+	SNA SZL
+	SMA
+	SPA
+	SMA SNL
+	SPA SZL
+	SMA SZA
+	SPA SNA
+	SMA SZA SNL
+	SPA SNA SZL
+	;; CLA
+	LAS
+	SZA CLA
+	SNA CLA
+	SMA CLA
+	SPA CLA
+
+	;; Operate Instruction (Group 3)
+	;; NOP
+	MQL
+	MQA
+	SWP
+	CLA
+	CAM
+	ACL
+	CLA SWP
+
+CLABEL:	07777
+
+	;; I/O Transfer Instruction
+	IOT	63 7
+	SKON
+	ION
+	IOF
+	SRQ
+	GTF
+	RTF
+	SGT
+	CAF
+
+	PANEL	ON
+
+	EXPECT	400
+	SKON
+	ENDEXPECT
+
+	PANEL	OFF
+
+	;;
+	;; Harris HD1-6120
+	;;
+
+	CPU	6120
+
+	;; Stack Operation Instruction
+	PPC1
+	PPC2
+	PAC1
+	PAC2
+	RTN1
+	RTN2
+	POP1
+	POP2
+	RSP1
+	RSP2
+	LSP1
+	LSP2
+
+	;; Internal Control Instruction
+	WSR
+	GCF
+
+	;; Main Memory Control Instruction
+	PR0
+	PR1
+	PR2
+	PR3
+
+	;; Panel Mode Control Instruction
+	PANEL	ON
+
+	PRS
+	PG0
+	PEX
+	CPD
+	SPD
+
+	PANEL	OFF
+
+	;; Memory Extension Instruction
+	CDF	1
+	CIF	4
+	CDF CIF	6
+	RDF
+	RIF
+	RIB
+	RMF
+
+	;;
+	;; Pseudo Instruction
+	;;
+	CPU	6100
+
+	07777
+	"IM6100" 0xd 012
+	
+	;; DECIMAL / OCTAL
+	OCTAL
+	2525
+	DECIMAL
+	2525
+
+	;;
+	;; Error situation
+	;;
+
+	IF MOMPASS>1
+	EXPECT 1010
+	ENDIF
+	FOO
+	IF MOMPASS>1
+	ENDEXPECT
+	ENDIF
+
+	PANEL	ON
+
+	END
Binary files asl-1.42b226/tests/t_6100/t_6100.ori and asl-1.42b226-im6100/tests/t_6100/t_6100.ori differ
